1. Field of the Invention
The present invention relates to the structure of an electronic device. The invention particularly relates to a method of driving an active matrix electronic device having a thin film transistor (TFT) that is formed on an insulator and to an electronic device driven by the method.
2. Description of the Related Art
EL displays have lately been attracting attention as a flat panel display to replace LCDs (liquid crystal displays), and researches are being actively made on the EL displays.
Similar to LCDs that have roughly two types of driving methods with one being passive matrix type used in, e.g., STN-LCDs and the other being active matrix type used in, e.g., TFT-LCDs, EL displays also are driven by roughly two types of driving methods. One is passive matrix type and the other is active matrix type.
In the case of the passive matrix type method, wirings to serve as electrodes are arranged above and below an EL element. A voltage is sequentially applied to the wirings to cause a current to flow in the EL element, whereby the EL element emits light. In the active matrix type method, on the other hand, each pixel has a TFT so that signals can be held in each pixel.
FIGS. 14A and 14B show an example of the structure of an active matrix electronic device used in EL displays. FIG. 14A is a diagram showing the entire circuit structure in which a pixel portion 1453 is arranged in the center of a substrate 1450. To the right and left of the pixel portion, gate signal line side driver circuits 1452 are arranged to control gate signal lines. It is not necessary to place the gate signal line side driver circuits 1452 on both sides of the pixel portion but instead one gate signal line side driver circuit may be provided on one side thereof. However, considering circuit operation efficiency and reliability, it is desirable to arrange the driver circuits on both sides. A source signal line side driver circuit 1451 for controlling source signal lines is arranged above the pixel portion 1453. One of pixels in FIG. 14A is enlarged and shown in FIG. 14B. Denoted by 1401 in FIG. 14B is a TFT functioning as a switching element when a signal is written in a pixel (hereinafter referred to as switching TFT). Reference symbol 1402 denotes a TFT functioning as an element for controlling a current to be supplied to an EL element 1403 (current controlling element) (the TFT will be referred to as EL driving TFT). According to a general and frequently employed method, a p-channel TFT is chosen as the EL driving TFT because source grounding is satisfactory in light of TFT behavior and there are restrictions in manufacture of the EL driving element 1403, and the EL driving TFT 1402 is arranged between an anode of the EL element 1403 and a current supply line 1407. Reference symbol 1404 denotes a storage capacitor for holding a signal (voltage) inputted from a source signal line 1406. The storage capacitor 1404 in FIG. 14B has one terminal connected to the current supply line 1407. However, wiring exclusive to the storage capacitor may be used instead. The switching TFT 1401 has a gate terminal connected to a gate signal line 1405, and has a source terminal connected to the source signal line 1406. The EL driving TFT 1402 has a drain terminal connected to an anode or a cathode of the EL element 1403, and has a source terminal connected to the current supply line 1407.
The EL element is comprised of an anode, a cathode, and a layer containing an organic compound that provides electro luminescence (luminescence generated by applying electric field) (the layer hereinafter referred to as EL layer). The luminescence from an organic compound can be divided into light emission upon returning from singlet excitation to the ground state (fluorescence) and light emission upon returning from triplet excitation to the ground state (phosphorescence). Both kinds of light emission can be used in light emitting devices to which the present invention is applicable.
The EL layer defined herein includes all the layers that are provided between an anode and a cathode. Specifically, the EL layer is comprised of a light emitting layer, a hole injection layer, an electron injection layer, a hole transportation layer, an electron transportation layer, and some other layers. The basic structure of an EL element is a laminate in which an anode, a light emitting layer and a cathode are sequentially layered. Other types of EL layer structure are a laminate in which an anode, a hole injection layer, a light emitting layer and a cathode are sequentially layered, and a laminate in which an anode, a hole injection layer, a light emitting layer, an electron transportation layer and a cathode are sequentially layered.
The EL element in this specification refers to an element composed of an anode, an EL layer and a cathode.
Now, the circuit operation of the active matrix electronic device is described with reference to FIGS. 14A and 14B. First, the gate signal line 1405 is selected to apply a voltage to a gate electrode of the switching TFT 1401 and turn the switching TFT 1401 conductive. Then signals (voltages) from the source signal line 1406 are accumulated in the storage capacitor 1404. The voltage of the storage capacitor 1404 serves as a gate-source voltage VGS of the EL driving TFT 1402, and hence a current flows in the EL driving TFT 1402 and the EL element 1403 in an amount corresponding to the voltage of the storage capacitor 1404. The EL element 1403 emits light as a result.
The luminance of the EL element 1403, namely, the amount of current flowing through the EL element 1403 can be controlled by VGS of the EL driving TFT 1402. VGS is the voltage of the storage capacitor 1404, which is equals to a signal (voltage) inputted to the source signal line 1406. In short, the luminance of the EL element 1403 is controlled by controlling the signal (voltage) inputted to the source signal line 1406. Lastly, the gate signal line 1405 is brought into not-selected state to close the gate of the switching TFT 1401 and turn the switching TFT 1401 unconductive. At this point, electric charges accumulated in the storage capacitor 1404 are held. Therefore, VGS of the EL driving TFT 1402 is held as it is, and a current flows through the EL driving TFT 1402 into the EL element 1403 in an amount corresponding to VGS.
Those described above have been reported in: SID 99 Digest, p. 372, “Current Status and Future of Light-emitting Polymer Display Driven by Poly-Si TFT”; ASIA DISPLAY 98, p. 217, “High Resolution Light Emitting Polymer Display Driven by Low Temperature Polysilicon Thin Film Transistor with Integrated Driver”; Euro Display 99, Late News, p. 27, “3.8 Green OLED with Low Temperature Poly-Si TFT”; etc.
Gray scale display methods for EL displays can be divided into an analog gray scale method and a digital gray scale method. The former method, i.e., the analog gray scale method, changes the luminance in an analog fashion by changing the gate-source voltage VGS of the EL driving TFT 1402 to control the amount of current flowing into the EL element 1403. In contrast thereto, according to the latter method, i.e., the digital gray scale method, there are only two states for the gate-source voltage VGS of the EL driving TFT 1402. It is either that VGS is in a range where the current is not at all allowed to flow in the EL element (less than “light-up start voltage”) or that VGS is in a range where the maximum amount of current flows (equal to or larger than “luminance saturation voltage”). Therefore the EL element is in either lights-on state or lights-off state, and there is no other state.
The digital gray scale method is mainly used in EL displays, for image display through this method is hardly affected by fluctuation in TFT characteristics such as threshold value. However, the digital gray scale method by itself is only capable of displaying in two gray scales. Therefore, several techniques have been proposed to provide multi-gray scale display by combining the digital gray scale method with other gray scale methods.
One of those proposals is a combination of the digital gray scale method and an area ratio gray scale method. The area ratio gray scale method is a method in which gray scale is obtained by controlling the area of the lit-up portions. To be specific, the method provides gray scale display by dividing one pixel into a plurality of sub-pixels to control the number or the area of the lit-up sub-pixels. This method has a drawback and there are difficulties in obtaining high resolution and multi-gray scale because the pixel can be divided into only a small number of sub-pixels. This area ratio gray scale method is detailed in: Euro Display 99, Late News, p. 71, “TFT-LEPD with Image Uniformity by Area Ratio Grav Scale”; IEDM 99, p. 107, “Technology for Active Matrix Light Emitting Polymer Displays”; etc.
Another technique for obtaining multi-gray scale with the digital gray scale method is to combine the digital gray scale method with a time gray scale method. The time gray scale method obtains gray scale by utilizing the difference in length of the lights-on periods. To be specific, gray scale is obtained in this method by dividing one frame period into a plurality of sub-frame periods to control the number or length of the sub-frame periods during which EL elements emit light.
The digital gray scale method may be combined with the area ratio gray scale method and the time gray scale method, which is detailed in IDW 99, p. 171, “Low-temperature Poly-Si TFT Driven Light-emitting-polymer Displays and Digital Gray Scale for Uniformity”.
FIGS. 15A and 15B are timing charts in a driving method using the combination of digital gray scale and time gray scale. An address (writing) period and a sustain (lights-on) period are completely separated from each other in a sub-frame period shown in FIG. 15A, whereas they are not separated in FIG. 15B.
In driving methods utilizing time gray scale, normally, an address (writing) period and a sustain (lights-on) period are needed for each bit. According to a driving method where an address (writing) period and a sustain (lights-on) period are completely separated from each other (a method where a sustain (lights-on) period in each sub-frame period starts only after an address (writing) period corresponding to one screen writing is completed), the address (writing) periods take up a large portion of one frame period. In addition, as shown in FIG. 15A, the address (writing) period has a period 1501 during which neither writing or lighting is carried out in rows other than a certain row as long as the gate signal line of that certain row is selected. Therefore duty ratio (the ratio of the length of sustain (Lights-on) periods in one frame) is very low. There is no other way than increasing the operation clock to shorten the address (writing) periods and, considering margin for the operation of the circuit, only limited gray scale is possible. In contrast to this method, a driving method in which an address (writing) period and a sustain (lights-on) period are not separated from each other starts the sustain (lights-on) period for, e.g., the k-th row EL element immediately after the completion of the gate signal line selecting period for the k-th row gate signal line. Therefore some pixels are lit up during the gate signal line selecting periods for the gate line signals of other rows, which makes this driving method advantageous in light of high duty ratio.
However, the method where an address (writing) period and a sustain (lights-on) period are not separated from each other has the following problem. The length of one address (writing) period extends from the start of the gate signal line selecting period for the first row gate signal line to the completion of the gate signal line selecting period for the last row gate signal line. Two different gate signal lines can not simultaneously be selected at some points. Accordingly, in the driving method where an address (writing) period and a sustain (lights-on) period are not separated from each other, the sustain (lights-on) period has to have a length equal to or longer than the length of the address (writing) period (strictly speaking, a length of a period starting upon completion of writing a signal for the first row gate signal line and ending with completion of writing a signal for the last row gate signal line). Thus there is a limitation in setting the minimum unit for the sustain (lights-on) period when aiming at multi-gray scale. The minimum unit in FIG. 15B corresponds to the length of a period denoted by 1502, where a period ending with completion of an address (writing) period Ta4 of a minimum bit sub-frame period SF4 does not overlap with a period starting upon start of the first address (writing) period of the next frame period. When a sustain (lights-on) period is shorter than the period 1502, normal display cannot be obtained. Since the length of a sustain (lights-on) period is determined by the ratio of power of 2 in the combination of the digital gray scale method and the time gray scale method, obtaining multi-gray scale is difficult within confinement set to the length of one frame period.